[Swift CI] Build Failure: OSS - Swift Package - Ubuntu 14.04 (master) #2559

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[FAILURE] oss-swift-package-linux-ubuntu-14_04 [#2559]

Build URL:
https://ci.swift.org/job/oss-swift-package-linux-ubuntu-14_04/2559/
Project:
oss-swift-package-linux-ubuntu-14_04
Date of build:
Sat, 10 Nov 2018 07:09:26 -0600
Build duration:
18 min

Changes

  • Commit 5e1b99cf3b50e2d013904a4ecc096cee77d91b86 by alexandros.lamprineas:
    [SelectionDAG] swap select_cc operands to enable folding

    • add: test/CodeGen/AArch64/select_cc.ll
    • edit: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    • edit: test/CodeGen/Thumb/branchless-cmp.ll
  • Commit 33b71d225743c92f00d73943994c540e8fe14f70 by florian.hahn:
    [IPSCCP,PM] Preserve DT in the new pass manager.

    • edit: lib/Transforms/Scalar/SCCP.cpp
    • add: test/Transforms/SCCP/ipsccp-preserve-domtree.ll
    • edit: lib/Transforms/IPO/SCCP.cpp
    • edit: include/llvm/Transforms/Scalar/SCCP.h
  • Commit 25761c3f2ce5c9890fde0cc891d462addd5cdabd by Andrea_DiBiagio:
    [llvm-mca] Use a small vector for instructions in the EntryStage.

    • edit: tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp
    • edit: tools/llvm-mca/include/Stages/EntryStage.h
    • edit: tools/llvm-mca/lib/Stages/EntryStage.cpp
  • Commit b4abfc2b2639f1b03c4c50c827a98684d96980ec by courbet:
    [llvm-exegesis][NFC] Add a way to declare the default counter binding

    • edit: lib/Target/AArch64/CMakeLists.txt
    • add: lib/Target/PowerPC/PPCPfmCounters.td
    • edit: unittests/tools/llvm-exegesis/AArch64/TargetTest.cpp
    • add: lib/Target/AArch64/AArch64PfmCounters.td
    • edit: lib/Target/X86/X86PfmCounters.td
    • edit: unittests/tools/llvm-exegesis/PowerPC/TargetTest.cpp
    • edit: lib/Target/AArch64/AArch64.td
    • edit: tools/llvm-exegesis/lib/Latency.cpp
    • edit: tools/llvm-exegesis/lib/Target.cpp
    • edit: lib/Target/PowerPC/CMakeLists.txt
    • edit: tools/llvm-exegesis/lib/PowerPC/Target.cpp
    • edit: include/llvm/Target/TargetPfmCounters.td
    • edit: tools/llvm-exegesis/lib/AArch64/Target.cpp
    • edit: tools/llvm-exegesis/lib/Latency.h
    • edit: lib/Target/PowerPC/PPC.td
    • edit: utils/TableGen/ExegesisEmitter.cpp
  • Commit ab7a1752bd269b04cdce6a00578d58bd324a923e by llvm-dev:
    [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI.

    • edit: lib/Target/X86/X86ISelLowering.cpp
  • Commit d81571aae0e749952d83c88ba4f71bfec1cfc9a6 by florian.hahn:
    Revert r346483: [CallSiteSplitting] Only record conditions up to the

    • edit: test/Other/new-pm-lto-defaults.ll
    • edit: lib/Transforms/Scalar/CallSiteSplitting.cpp
    • edit: test/Other/opt-O3-pipeline.ll
    • edit: test/Transforms/CallSiteSplitting/callsite-split-or-phi.ll
  • Commit 68b4c69fd4a84ca990b4af16f2595bd411d3c135 by courbet:
    [llvm-exegesis] Fix unit tests on PowerPC/AArch64.

    • edit: unittests/tools/llvm-exegesis/AArch64/TargetTest.cpp
    • edit: unittests/tools/llvm-exegesis/PowerPC/TargetTest.cpp
  • Commit 3927975de97c0f9b6860dbd6660be2e16f0ec098 by kparzysz:
    [Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag

    • edit: lib/MC/MCParser/ELFAsmParser.cpp
    • add: test/MC/Hexagon/gprel-shflag.s
    • edit: lib/MC/MCSectionELF.cpp
  • Commit eff069b6c81483472fe168904d7de29b61ba02ae by Petar.Avramovic:
    [MIPS GlobalISel] narrowScalar G_CONSTANT

    • edit: lib/Target/Mips/MipsLegalizerInfo.cpp
  • Commit f9eeeb27cc20a61a5f6d95946c7a3a55f0aa7f64 by asb:
    [RISCV] Update test/CodeGen/RISCV/calling-conv.ll after rL346432

    • edit: test/CodeGen/RISCV/calling-conv.ll
  • Commit a0f2a5f4a58f52150b96bae4520a2413ab8bf17c by asb:
    [RISCV] Avoid unnecessary XOR for seteq/setne 0

    • edit: test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
    • edit: test/CodeGen/RISCV/i32-icmp.ll
    • edit: test/CodeGen/RISCV/get-setcc-result-type.ll
    • edit: lib/Target/RISCV/RISCVInstrInfo.td
    • edit: test/CodeGen/RISCV/calling-conv.ll
    • edit: test/CodeGen/RISCV/fp128.ll
  • Commit 7dd8750708e6c01f58ad9094ce2f9e7244f81684 by spatel:
    [x86] try to form broadcast before widening shuffle elements

    • edit: lib/Target/X86/X86ISelLowering.cpp
    • edit: test/CodeGen/X86/vector-shuffle-128-v4.ll
    • edit: test/CodeGen/X86/insert-into-constant-vector.ll
    • edit: test/CodeGen/X86/shuffle-of-splat-multiuses.ll
    • edit: test/CodeGen/X86/haddsub-undef.ll
    • edit: test/CodeGen/X86/vector-shuffle-combining.ll
  • Commit 72e06ac443f6e2d63c03e362656d2d48ab7a22cb by sam.parker:
    [ARM] Don't promote i1 types in ARM CGP

    • edit: lib/Target/ARM/ARMCodeGenPrepare.cpp
    • edit: test/CodeGen/ARM/CGP/arm-cgp-casts.ll
    • edit: test/CodeGen/ARM/CGP/arm-cgp-calls.ll
  • Commit 1949578de3a69064c320fc9b19e44316fa324031 by sam.mccall:
    Revert "[VFS] Add "expand tilde" argument to getRealPath."

    • edit: lib/Support/VirtualFileSystem.cpp
    • edit: unittests/Support/VirtualFileSystemTest.cpp
    • edit: include/llvm/Support/VirtualFileSystem.h
  • Commit d3f6231202286057024565a0a82e9d53deb82eb9 by nhaehnle:
    AMDGPU: Add testcase to demonstrate a condition with pre-existing

    • add: test/CodeGen/AMDGPU/waitcnt-preexisting.mir
  • Commit 66e6766eea4bef2767a6b8f8853ccf9173d5f5dd by paulsson:
    [SystemZ] Avoid inserting same value after replication

    • edit: lib/Target/SystemZ/SystemZISelLowering.cpp
    • add: test/CodeGen/SystemZ/vec-move-19.ll
  • Commit fcdc267f220af94eec73bd071b5b8a8025131bcb by mmoroz:
    [llvm-cov] Add lcov tracefile export format.

    • edit: tools/llvm-cov/CoverageViewOptions.h
    • edit: docs/ReleaseNotes.rst
    • edit: docs/CommandGuide/llvm-cov.rst
    • add: test/tools/llvm-cov/showLineExecutionCounts-lcov.test
    • edit: tools/llvm-cov/CodeCoverage.cpp
    • add: tools/llvm-cov/CoverageExporterLcov.cpp
    • edit: tools/llvm-cov/CMakeLists.txt
    • edit: tools/llvm-cov/SourceCoverageView.cpp
    • add: tools/llvm-cov/CoverageExporterLcov.h
  • Commit fd0b2c484aef30206b9f732ecdfa8428294085f2 by a.bataev:
    Revert "[DEBUGINFO, NVPTX]DO not emit ',debug' option if no debug info

    • edit: lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
    • edit: lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
    • delete: test/DebugInfo/NVPTX/debug-file-loc-only.ll
    • edit: lib/Target/NVPTX/NVPTXAsmPrinter.cpp
  • Commit 9887d2b015d8a4d10ac32077bf8a925640e19a31 by listmail:
    [docs][statepoint] tweak a title

    • edit: docs/Statepoints.rst
  • Commit 3ccdf221e97da5197f00766da95e488cac9391a7 by llvm-dev:
    [CostModel] Add SK_ExtractSubvector handling to getInstructionThroughput

    • edit: test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
    • edit: include/llvm/IR/Instructions.h
    • edit: lib/Analysis/TargetTransformInfo.cpp
    • edit: lib/IR/Instructions.cpp
  • Commit 7bade9c965f233df8e9b005845daa35a6fe953ba by syzaara:
    [Power9] Allow gpr callee saved spills in prologue to vectors registers

    • edit: include/llvm/CodeGen/MachineFrameInfo.h
    • add: test/CodeGen/MIR/PowerPC/prolog_vec_spills.mir
    • edit: lib/Target/PowerPC/PPCFrameLowering.h
    • edit: lib/CodeGen/MIRPrinter.cpp
    • edit: lib/Target/PowerPC/PPCFrameLowering.cpp
    • edit: lib/CodeGen/PrologEpilogInserter.cpp
  • Commit 55d210a76b0c5f518b2c98ab076c44a45412afc9 by listmail:
    [docs][statepoint] Expand a bit on problems with mixing references and

    • edit: docs/Statepoints.rst
  • Commit 8af59ae9700b813a873dbc784523c8411a6f9e3d by mmoroz:
    [llvm-cov] Remove "default:" label in the switch covering all enum

    • edit: tools/llvm-cov/CodeCoverage.cpp
  • Commit b9e113385eeab73c3586fa4d80de28765fbf3558 by maskray:
    Fix -Wsign-compare warning

    • edit: lib/IR/Instructions.cpp
  • Commit d32f7814bc9a415d2ff3d6afe235ec82faf0db87 by listmail:
    [docs][statepoints] Reformulate open issues list

    • edit: docs/Statepoints.rst
  • Commit bbe5fdb08d283c9fc5db19410caf0efc08fb53df by sguelton:
    Type safe version of MachinePassRegistry

    • edit: lib/CodeGen/TargetPassConfig.cpp
    • edit: lib/CodeGen/MachinePassRegistry.cpp
    • edit: include/llvm/CodeGen/MachineScheduler.h
    • edit: include/llvm/CodeGen/RegAllocRegistry.h
    • edit: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    • edit: lib/CodeGen/MachineScheduler.cpp
    • edit: include/llvm/CodeGen/MachinePassRegistry.h
    • edit: include/llvm/CodeGen/SchedulerRegistry.h
  • Commit dab756ad3ecde5c82c8e127224511782fe6cb3de by kparzysz:
    [Hexagon] Place globals with explicit .sdata section in small data

    • edit: lib/Target/Hexagon/HexagonTargetObjectFile.cpp
    • add: test/CodeGen/Hexagon/sdata-explicit-section.ll
  • Commit 8153acf695e879103b96e3f1faabbbd0d95d6834 by Stanislav.Mekhanoshin:
    [AMDGPU] Always pass TRI into findRegister[Use/Def]OperandIdx

    • edit: lib/Target/AMDGPU/R600InstrInfo.cpp
    • edit: lib/Target/AMDGPU/SIInstrInfo.cpp
    • edit: lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
    • edit: lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
  • Commit 10702260719bda7b0d166d93d515b5c611ce7f21 by rupprecht:
    [llvm-strings] Fix whitespaces to match strings output.

    • edit: tools/llvm-strings/llvm-strings.cpp
    • edit: test/tools/llvm-strings/file-filename.test
    • add: test/tools/llvm-strings/radix-filename.test
    • edit: test/tools/llvm-strings/radix.test
    • edit: test/tools/llvm-strings/negative-char.test
    • add: test/tools/llvm-strings/whitespace.test
  • Commit 6b4d662418d2475d282e3b2f309798b210d6a666 by craig.topper:
    [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between

    • edit: test/CodeGen/X86/widen_conv-3.ll
    • edit: test/CodeGen/X86/known-signbits-vector.ll
    • edit: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    • edit: test/CodeGen/Mips/cconv/vector.ll
    • edit: test/CodeGen/X86/widen_conv-4.ll
    • edit: test/CodeGen/X86/vec_cast.ll
    • edit: test/CodeGen/X86/vec_int_to_fp.ll
  • Commit 6517c35cb714c419a87b1bbe8929191b02e2915a by gclayton:
    Add total function byte size and inline function byte size to

    • edit: test/tools/llvm-dwarfdump/X86/statistics.ll
    • edit: tools/llvm-dwarfdump/Statistics.cpp
  • Commit c5c6cf3239dae797128e227f96cc4ad4159cca95 by bcahoon:
    [Hexagon] Implement noreturn optimization

    • edit: lib/Target/Hexagon/HexagonSubtarget.h
    • edit: lib/Target/Hexagon/HexagonFrameLowering.cpp
    • edit: lib/Target/Hexagon/HexagonFrameLowering.h
    • add: test/CodeGen/Hexagon/noreturn-stack-elim.ll
    • edit: lib/Target/Hexagon/Hexagon.td
  • Commit 8d5b2ca477501308f42c96acdb30630264c529e0 by Stanislav.Mekhanoshin:
    [AMDGPU] Cleanup optimize-if-exec-masking.mir test. NFC.

    • edit: test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
  • Commit ec09d9119e41c4daadd4db3fc840e82dab354664 by llvm-dev:
    [TTI] Flip vector types in getShuffleCost SK_ExtractSubvector call

    • edit: lib/Analysis/TargetTransformInfo.cpp
  • Commit 33e86fa85e54ed04094d68e61f977970f202967b by maskray:
    [WebAssembly] Hotfix of WebAssemblyInstructionTableSize after rL346465

    • edit: lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
  • Commit f8c45edd42db61500e1227dc5606661fa9f38444 by rupprecht:
    [Hexagon] Fix unused variable warning in release builds

    • edit: lib/Target/Hexagon/HexagonFrameLowering.cpp
  • Commit 5d3d354eee716617ec439d45645e52b79bad12e7 by llvm-dev:
    [CostModel][X86] SK_ExtractSubvector is free if the subvector is at the

    • edit: test/Analysis/CostModel/X86/reduce-add.ll
    • edit: test/Analysis/CostModel/X86/reduce-umax.ll
    • edit: test/Analysis/CostModel/X86/reduce-xor.ll
    • edit: test/Analysis/CostModel/X86/reduce-and.ll
    • edit: test/Analysis/CostModel/X86/reduce-umin.ll
    • edit: test/Analysis/CostModel/X86/reduction.ll
    • edit: test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
    • edit: lib/Target/X86/X86TargetTransformInfo.cpp
    • edit: test/Analysis/CostModel/X86/reduce-or.ll
    • edit: test/Analysis/CostModel/X86/reduce-mul.ll
    • edit: test/Analysis/CostModel/X86/reduce-smin.ll
    • edit: test/Transforms/SLPVectorizer/X86/reduction_unrolled.ll
    • edit: test/Analysis/CostModel/X86/reduce-smax.ll
  • Commit 9ce4cce9319ad70243729fa68344af0ef9fc51f1 by craig.topper:
    [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't

    • edit: test/CodeGen/X86/avx512-trunc.ll
    • edit: test/CodeGen/X86/avx512-fma.ll
    • edit: test/CodeGen/X86/avx512-vec-cmp.ll
    • edit: test/CodeGen/X86/avx512-masked-memop-64-32.ll
    • edit: test/CodeGen/X86/masked_memop.ll
    • edit: test/CodeGen/X86/compress_expand.ll
    • edit: test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
    • edit: test/CodeGen/X86/vector-shuffle-v1.ll
    • edit: test/CodeGen/X86/vector-shuffle-512-v16.ll
    • edit: test/CodeGen/X86/avx512-mask-op.ll
    • edit: test/CodeGen/X86/pmul.ll
    • edit: test/CodeGen/X86/avx512-insert-extract.ll
    • edit: test/CodeGen/X86/vector-trunc.ll
    • edit: test/CodeGen/X86/avx512-select.ll
    • edit: test/CodeGen/X86/masked_gather_scatter.ll
    • edit: test/CodeGen/X86/setcc-lowering.ll
    • edit: test/CodeGen/X86/shuffle-vs-trunc-256.ll
    • edit: test/CodeGen/X86/avx512-ext.ll
    • edit: test/CodeGen/X86/vselect-packss.ll
    • edit: test/CodeGen/X86/vector-shuffle-512-v8.ll
    • edit: test/CodeGen/X86/vector-trunc-math.ll
    • edit: lib/Target/X86/X86ISelLowering.cpp
  • Commit 80691e1b437b8055dad90daa77cf9214a9b59413 by paul.robinson:
    [DWARFv5] Emit normal type units in .debug_info comdats.

    • edit: lib/MC/MCObjectFileInfo.cpp
    • edit: lib/CodeGen/AsmPrinter/DwarfDebug.cpp
    • edit: test/CodeGen/X86/dwarf-headers.ll
    • edit: test/DebugInfo/X86/string-offsets-multiple-cus.ll
    • edit: include/llvm/MC/MCObjectFileInfo.h
  • Commit 4d8909c55ddc9f275ab8efa4d072ae41d054be84 by ulrich.weigand:
    [SystemZ] Add a couple of missing tests

    • edit: test/CodeGen/SystemZ/fp-round-01.ll
  • Commit 5ac7dfd5c9616f4c8b14734a9ae519dba74b6c3d by maskray:
    [Hexagon] Fix some -Wunused-function with LLVM_DUMP_METHOD and

    • edit: lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
    • edit: lib/Target/Hexagon/HexagonFrameLowering.cpp
  • Commit 86c04a0332326df3a548e0254f8a07a6159230f1 by nicolasweber:
    [MS demangler] Use a slightly shorter unmangling for mangled strings.

    • edit: lib/Demangle/MicrosoftDemangleNodes.cpp
    • edit: test/Demangle/ms-string-literals.test
    • edit: test/Demangle/ms-operators.test
  • Commit d09d3d9eec1af25eb4109d503d623ca0297a3898 by Andrea_DiBiagio:
    [llvm-mca] Account for buffered resources when analyzing "Super"

    • edit: tools/llvm-mca/lib/InstrBuilder.cpp
  • Commit 0ea548887e95f988fd3a13f4f3c703166563559b by bryan.chan:
    [AArch64] Support HiSilicon's TSV110 processor

    • edit: lib/Target/AArch64/AArch64.td
    • edit: test/CodeGen/AArch64/cpus.ll
    • edit: lib/Target/AArch64/AArch64Subtarget.cpp
    • edit: test/MC/AArch64/armv8.2a-dotprod.s
    • edit: test/CodeGen/AArch64/remat.ll
    • edit: test/MC/AArch64/ras-extension.s
    • edit: lib/Target/AArch64/AArch64Subtarget.h
    • edit: unittests/Support/Host.cpp
    • edit: include/llvm/Support/AArch64TargetParser.def
    • edit: test/MC/AArch64/crc.s
    • edit: test/MC/AArch64/armv8.1a-lse.s
    • edit: test/MC/Disassembler/AArch64/armv8.2a-dotprod.txt
    • edit: lib/Support/Host.cpp
    • edit: unittests/Support/TargetParserTest.cpp
  • Commit 3593f97ffbb0d90812492361762f8a9c60a350ea by jyknight:
    Branch/tag all projects with a single commit in release-tagging script.

    • edit: utils/release/tag.sh
  • Commit 52d7ce62d6f137aac712501f52462348bffb77ce by craig.topper:
    [X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw

    • edit: test/CodeGen/X86/vector-compare-results.ll
    • edit: test/CodeGen/X86/vector-trunc.ll
    • edit: test/CodeGen/X86/pmul.ll
    • edit: test/CodeGen/X86/prefer-avx256-trunc.ll
    • edit: test/CodeGen/X86/shuffle-vs-trunc-512.ll
    • edit: test/CodeGen/X86/vector-trunc-math.ll
    • edit: test/CodeGen/X86/vector-sext.ll
    • edit: test/CodeGen/X86/vector-trunc-packus.ll
    • edit: lib/Target/X86/X86InstrAVX512.td
    • edit: test/CodeGen/X86/avx512-trunc.ll
    • edit: test/CodeGen/X86/vector-trunc-usat.ll
    • edit: lib/Target/X86/X86ISelLowering.cpp
    • edit: test/CodeGen/X86/vector-trunc-ssat.ll
    • edit: test/CodeGen/X86/vector-reduce-mul.ll
  • Commit e0105bee1ff56753efb453b51418f25c4b57299e by tlively:
    [WebAssembly] Disable custom NaN payload tests

    • edit: test/CodeGen/WebAssembly/immediates.ll
  • Commit 088520252029a2d686d8c426f73113da32f51f39 by tlively:
    Revert "Exclude wasm target from Windows packaging due to PR39448"

    • edit: utils/release/build_llvm_package.bat
  • Commit bd0f067b12310397d4201e8cb862512de788ec18 by efriedma:
    [JumpThreading] Fix exponential time algorithm computing known values.

    • edit: test/Transforms/JumpThreading/crash.ll
    • edit: include/llvm/Transforms/Scalar/JumpThreading.h
    • edit: lib/Transforms/Scalar/JumpThreading.cpp
  • Commit 35ef1bd84b873490de4cf1231e3f4433684a57d4 by efriedma:
    [ARM] Add MemOperand to LDRcp to enable DCE.

    • edit: lib/Target/ARM/ARMFastISel.cpp
    • add: test/CodeGen/ARM/ldrcppic.ll
  • Commit a64afff8f49bdc7ea521069a1540d64914db2ae0 by craig.topper:
    [SelectionDAG] Fix a -Wparentheses warning from gcc in an assert. NFC

    • edit: lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  • Commit 9d4ebca2829dd4b9a82ac878e26d24a9fa970f8c by me:
    [AVR] Reorder the CHECK lines in directmem.ll to match current trunk

    • edit: test/CodeGen/AVR/directmem.ll
  • Commit 25938772e8c9cf36a738656a1f1ce44335b6950e by efriedma:
    [ARM64] [Windows] Handle funclets

    • edit: lib/Target/AArch64/AArch64FrameLowering.h
    • edit: lib/Target/AArch64/AArch64InstrInfo.td
    • edit: lib/Target/AArch64/AArch64MCInstLower.cpp
    • add: test/CodeGen/AArch64/wineh-try-catch-realign.ll
    • add: test/CodeGen/AArch64/wineh-try-catch-vla.ll
    • edit: lib/Target/AArch64/AArch64ISelLowering.cpp
    • edit: lib/Target/AArch64/AArch64FrameLowering.cpp
    • add: test/CodeGen/AArch64/wineh-try-catch.ll
    • edit: lib/Target/AArch64/AArch64RegisterInfo.cpp
    • edit: lib/Target/AArch64/AArch64InstrInfo.cpp
    • edit: lib/Target/AArch64/AArch64RegisterInfo.h
    • add: test/CodeGen/AArch64/wineh-try-catch-nobase.ll
    • edit: lib/Target/AArch64/AArch64ISelLowering.h
  • Commit b92d1fef8df0c185a5d375cbea2d3c58043d46e7 by listmail:
    [GC] Simplify linking of GC builtin GC strategies

    • edit: lib/CodeGen/BuiltinGCs.cpp
    • edit: include/llvm/CodeGen/GCs.h
    • edit: include/llvm/CodeGen/LinkAllCodegenComponents.h
  • Commit e0f010c2e2476acb6d09b85fa436ed78cef8264b by tlively:
    [WebAssembly] Update bleeding-edge cpu features

    • edit: lib/Target/WebAssembly/WebAssembly.td
  • Commit bc177f5fc7daec44443696c769da13ef8518cd80 by craig.topper:
    [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes instead of

    • edit: lib/Target/X86/X86ISelLowering.cpp
    • edit: test/CodeGen/X86/vector-tzcnt-128.ll
    • edit: test/CodeGen/X86/vector-popcnt-128.ll
  • Commit 02fce9c9ac2328e79eecc09bfef3272ce7672028 by matze:
    test/CodeGen/X86: Relax test case

    • edit: test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
  • Commit 3816d0097195b9362e2178d94d02ae3323d3e5c0 by matze:
    RegAllocFast: Further cleanups; NFC

    • edit: lib/CodeGen/RegAllocFast.cpp
  • Commit 8614602e2f157cd45c4a8a03a9daa50023a6dcc3 by devnexen:
    Fix DragonFlyBSD build

    • edit: lib/Support/Unix/Path.inc
  • Commit 6c3e6aa54233fc28a5ae601cd5075d9665d20b9b by craig.topper:
    [X86] Add a test case to show scalarized vector srem to demonstrate

    • edit: test/CodeGen/X86/vector-idiv-sdiv-128.ll
  • Commit 01568d51f085ba06fad7f523d1faffb1c0971089 by craig.topper:
    [X86] Use a MOVSX instruction instead of a MOVZX instruction in isel for

    • edit: test/CodeGen/X86/vector-idiv-sdiv-128.ll
    • edit: lib/Target/X86/X86InstrCompiler.td
  • Commit 10c84a8f35cae4a9fc421648d9608fccda3925f2 by eleviant:
    [ThinLTO] Internalize readonly globals

    • add: test/ThinLTO/X86/Inputs/index-const-prop-comdat.ll
    • edit: include/llvm/IR/ModuleSummaryIndex.h
    • edit: test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
    • edit: test/Bitcode/thinlto-function-summary-callgraph-relbf.ll
    • add: test/ThinLTO/X86/Inputs/index-const-prop-gvref.ll
    • edit: test/ThinLTO/X86/dot-dumper.ll
    • edit: test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll
    • add: test/ThinLTO/X86/Inputs/index-const-prop-full-lto.ll
    • add: test/ThinLTO/X86/index-const-prop-full-lto.ll
    • edit: include/llvm/Transforms/Utils/FunctionImportUtils.h
    • edit: test/Bitcode/thinlto-alias2.ll
    • edit: lib/Bitcode/Reader/BitcodeReader.cpp
    • add: test/ThinLTO/X86/index-const-prop-ldst.ll
    • edit: test/Bitcode/thinlto-function-summary-refgraph.ll
    • add: test/ThinLTO/X86/Inputs/index-const-prop.ll
    • edit: test/Bitcode/thinlto-function-summary-callgraph-cast.ll
    • add: test/ThinLTO/X86/Inputs/index-const-prop-define-g.ll
    • add: test/ThinLTO/X86/Inputs/index-const-prop-alias.ll
    • edit: lib/IR/ModuleSummaryIndex.cpp
    • add: test/ThinLTO/X86/index-const-prop.ll
    • add: test/ThinLTO/X86/index-const-prop2.ll
    • edit: lib/Analysis/ModuleSummaryAnalysis.cpp
    • edit: lib/Transforms/IPO/FunctionImport.cpp
    • edit: test/Bitcode/thinlto-alias.ll
    • add: test/ThinLTO/X86/index-const-prop-alias.ll
    • add: test/ThinLTO/X86/index-const-prop-dead.ll
    • add: test/ThinLTO/X86/index-const-prop-gvref.ll
    • edit: lib/Linker/IRMover.cpp
    • edit: lib/Bitcode/Writer/BitcodeWriter.cpp
    • edit: lib/Transforms/Utils/FunctionImportUtils.cpp
    • edit: lib/LTO/ThinLTOCodeGenerator.cpp
    • edit: test/Bitcode/thinlto-function-summary-callgraph.ll
    • edit: lib/LTO/LTO.cpp
    • add: test/ThinLTO/X86/index-const-prop-O0.ll
    • edit: include/llvm/Transforms/IPO/FunctionImport.h
    • edit: test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
    • edit: lib/AsmParser/LLParser.cpp
    • edit: test/ThinLTO/X86/globals-import-const-fold.ll
    • add: test/ThinLTO/X86/index-const-prop-comdat.ll
    • add: test/ThinLTO/X86/Inputs/index-const-prop-linkage.ll
    • add: test/ThinLTO/X86/index-const-prop-linkage.ll
    • edit: test/Bitcode/summary_version.ll
  • Commit 6557f4a16fa61876a7e29740a44894c8f93ff015 by lebedev.ri:
    [NFC][MCA][BdVer2] Add bdver2 runline into register-file-statistics.s

    • edit: test/tools/llvm-mca/X86/register-file-statistics.s
  • Commit e815f25dd58e2695acc441bbffd909e170c0c8f9 by kadircet:
    revert rL346478

    • edit: unittests/Host/FileSystemTest.cpp
  • Commit eb1d06bbb1e0ee6a33cbf03a5ab9c33b6006c31d by zturner:
    Resubmit "Fix bug in PE/COFF plugin."

    • edit: lit/SymbolFile/NativePDB/ast-reconstruction.cpp
    • add: lit/SymbolFile/NativePDB/globals-bss.cpp
    • add: lit/SymbolFile/NativePDB/Inputs/globals-bss.lldbinit
    • edit: source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
  • Commit 6a1a18db5b612a4b5c3846b20f899417441269c3 by zturner:
    [NativePDB] Add support for bitfield records.

    • edit: source/Plugins/SymbolFile/NativePDB/UdtRecordCompleter.cpp
    • add: lit/SymbolFile/NativePDB/bitfields.cpp
    • add: lit/SymbolFile/NativePDB/Inputs/bitfields.lldbinit
  • Commit f1cbcafc2d3a748cf03c295097364f1d0e096d68 by zturner:
    [NativePDB] Fix completion of enum types.

    • edit: source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
    • edit: lit/SymbolFile/NativePDB/ast-reconstruction.cpp
  • Commit 31c79563576a30f52254c88eecd0404354fe3327 by aprantl:
    Annotate switch with LLVM_FALLTHROUGH

    • edit: tools/debugserver/source/RNBRemote.cpp
    • edit: tools/debugserver/source/DNBRegisterInfo.cpp
  • Commit e1e5db7e88d3d0734fa6e7a64e6674dc7bcba8c7 by aprantl:
    Add missing include

    • edit: tools/debugserver/source/DNBRegisterInfo.cpp
  • Commit e978b90ddb49a9763e15f8b2a57ee1427c2f9760 by aprantl:
    Add missing include

    • edit: tools/debugserver/source/RNBRemote.cpp
  • Commit 780077616b1ebaaac4e7f278013cc41c502aaf91 by jmolenda:
    Remove llvm include from debugserver, change LLVM_FALLTHROUGH's to

    • edit: tools/debugserver/source/RNBRemote.cpp
    • edit: tools/debugserver/source/DNBRegisterInfo.cpp
  • Commit 256337a57d0015bc8179b85e9946a7af3d539190 by jmolenda:
    Work with a gdb-remote target that doesn't handle the

    • edit: source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
    • add: packages/Python/lldbsuite/test/functionalities/gdb_remote_client/TestNoWatchpointSupportInfo.py
    • edit: source/Target/Target.cpp
  • Commit fd368ec367e89df9336662dd762e7a8bd9638ac8 by jmolenda:
    Enable listening for EXC_RESOURCE events, and format mach event as a

    • edit: tools/debugserver/source/MacOSX/MachException.cpp
    • edit: source/Plugins/Process/Utility/StopInfoMachException.cpp
  • Commit 8f9850b63aebd19f7336af8c75e753be08cea73e by aprantl:
    Add extra diagnostics to test

    • edit: packages/Python/lldbsuite/test/functionalities/exec/TestExec.py
  • Commit 8661f6507020a96c127f88af9e0a365b0b61a5ef by jmolenda:
    Unbreak the linux bot from the previous commit. Fred needed to use some

    • edit: source/Plugins/Process/Utility/StopInfoMachException.cpp
  • Commit f0debca27dcf617257530291f705eb25459b3980 by eugeni.stepanov:
    [hwasan] Add entire report to abort message on Android.

    • edit: lib/hwasan/hwasan_report.h
    • edit: lib/hwasan/hwasan_linux.cc
    • add: test/hwasan/TestCases/abort-message-android.cc
    • edit: lib/hwasan/hwasan.h
    • edit: lib/hwasan/hwasan_report.cc
    • edit: lib/hwasan/hwasan.cc
  • Commit 1b7992cf58487851a99f5b8e885e2b008777d2fe by rnk:
    Re-land r343606 "[winasan] Unpoison the stack in NtTerminateThread"

    • edit: lib/asan/asan_win.cc
    • edit: test/asan/TestCases/Windows/dll_host.cc
  • Commit d26d3284aa01ab380a239dfa884d95514b47d117 by n54:
    Correct atexit(3) support in MSan/NetBSD

    • edit: lib/msan/msan_interceptors.cc

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