# Is there support for Xtensa LX7 cores? **URL:** \ **Category:** Embedded\ **Created:** [June 13, 2024, 10:00pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458 "2024-06-13T22:00:01Z")\ **Posts on this page:** 14\ **Page:** 1
**Author:** ![JetForMe](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/jetforme/32/482_2.png) [@JetForMe](https://forums.swift.org/u/JetForMe)\ **Post date:** [June 13, 2024, 10:00pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/1 "2024-06-13T22:00:01Z")
I can't express how excited I am for the recent progress in embedded Swift. Is there support for the Xtensa LX7 core yet? It's used in the ESP32-S3, which is used in a very popular [line of boards](https://esp32s3.com) that I’d love to be able to target. ---
**Author:** ![rauhul](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/rauhul/32/35207_2.png) [@rauhul](https://forums.swift.org/u/rauhul)\ **Post date:** [June 13, 2024, 10:08pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/2 "2024-06-13T22:08:03Z")
Unfortunately support for the Xtensa ISA is maintained in an Espressif fork of LLVM. If this is something you're interested in, the best step would be helping figure out how to upstream their diff to LLVM so Swift can use them. ---
**Author:** ![JetForMe](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/jetforme/32/482_2.png) [@JetForMe](https://forums.swift.org/u/JetForMe)\ **Post date:** [June 13, 2024, 10:09pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/3 "2024-06-13T22:09:52Z")
At least the [description](https://github.com/espressif/llvm-project) says “To be upstreamed.” I opened this [issue](https://github.com/espressif/llvm-project/issues/96) with them to hopefully bring attention to it. ---
**Author:** ![Philippe\_Hausler](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/philippe_hausler/32/22569_2.png) [@Philippe\_Hausler](https://forums.swift.org/u/Philippe_Hausler)\ **Post date:** [June 13, 2024, 11:13pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/4 "2024-06-13T23:13:46Z")
I know @kubamracek was poking at that - from what I understand as soon as they are able to get that merged upstream the Swift side of it is VERY trivial. ---
**Author:** ![metehus](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/metehus/32/35898_2.png) [@metehus](https://forums.swift.org/u/metehus)\ **Post date:** [June 14, 2024, 12:26am UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/5 "2024-06-14T00:26:38Z")
I'm also very interested on supporting swift on xtensa chips. Also, I'm intrigued because i've seen the esp-rs efforts to bring rust to esp socs, and they have good support for the xtensa chips, and they seem to use llvm too: [GitHub - esp-rs/rust: Rust for the xtensa architecture. Built in targets for the ESP32 and ESP8266](https://github.com/esp-rs/rust) I don't know much about compilers and these kinda stuff so I'm very likely wrong, but also just curious about the details of this implementation ---
**Author:** ![wick](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/wick/32/30405_2.png) [@wick](https://forums.swift.org/u/wick)\ **Post date:** [June 14, 2024, 12:37am UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/6 "2024-06-14T00:37:51Z")
Just adding my +1 — can’t contribute very much to compilers and such but ESP32-S3 is my microcontroller of choice as of late and it would be fantastic to use Embedded Swift in those projects. ---
**Author:** ![Morten\_Bek\_Ditlevsen](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/morten_bek_ditlevsen/32/28133_2.png) [@Morten\_Bek\_Ditlevsen](https://forums.swift.org/u/Morten_Bek_Ditlevsen)\ **Post date:** [June 14, 2024, 4:47am UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/7 "2024-06-14T04:47:52Z")
There’s already a progress tracking issue on their repo and it’s only lacking on checkmark. I don’t know if this means they’re close to done? > > > I understand it will take quite some time for this backend to be merged upstream… into LLVM. > > This issue is for notifying anyone that subscribes to it when the merge to upstream has completed closing this issue. ---
**Author:** ![JetForMe](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/jetforme/32/482_2.png) [@JetForMe](https://forums.swift.org/u/JetForMe)\ **Post date:** [June 14, 2024, 5:02am UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/8 "2024-06-14T05:02:15Z")
According to that [comment](https://github.com/espressif/llvm-project/issues/4#issuecomment-2163313899), they've sent patches upstream, as of a couple of days ago. I don't know if that's everything, or how long it will take LLVM to accept them. ---
**Author:** ![dom](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/dom/32/35891_2.png) [@dom](https://forums.swift.org/u/dom)\ **Post date:** [June 14, 2024, 6:00pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/9 "2024-06-14T18:00:55Z")
Also interested in Xtensa support. In [Embedded Swift Example Projects for ARM and RISC-V Microcontrollers - #13 by kubamracek](https://forums.swift.org/t/embedded-swift-example-projects-for-arm-and-risc-v-microcontrollers/71066/13) @kubamracek mentioned that llvm backend support isn't enough, that we need clang support as well. Does anyone know if anybody is working on this? ---
**Author:** ![ant](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/ant/32/32548_2.png) [@ant](https://forums.swift.org/u/ant)\ **Post date:** [June 14, 2024, 9:28pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/10 "2024-06-14T21:28:14Z")
I'm also adding my +1 for the support of those chips and I'd be glad to help for potential tasks that don't require too much compiler-related skills if you have some! ---
**Author:** ![MikeIsaev](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/mikeisaev/32/3446_2.png) [@MikeIsaev](https://forums.swift.org/u/MikeIsaev)\ **Post date:** [June 29, 2024, 6:46pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/11 "2024-06-29T18:46:19Z")
Seems that PR is moving forward fast 🚀 ---
**Author:** ![JetForMe](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/jetforme/32/482_2.png) [@JetForMe](https://forums.swift.org/u/JetForMe)\ **Post date:** [June 29, 2024, 6:50pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/12 "2024-06-29T18:50:46Z")
Doesn’t seem that fast to me. They’re estimating next [year](https://github.com/espressif/llvm-project/issues/4#issuecomment-2190773478), mostly due to the long turnaround getting PRs reviewed. > Probably we need to merge about 30-40 patches to implement most of functionality to be able generate Rust code and compile ESP-IDF examples: > > 1. Currently we have 10 prepared patches with base functionality not upstreamed ([Tracking Issue for merging to upstream (LLVM-57) #4 (comment)](https://github.com/espressif/llvm-project/issues/4#issuecomment-2189374398)). This patches are not very large, so I think optimistic estimation is to spend 1-1,5 week on each patch to upstream. > So process in optimal way will be finished in September. > 2. Implement other Xtensa features like Window, Boolean, Float, etc. It is about 8-12 patches. Also in optimistic case will take another 3 month and wiil be finished in November. > 3. Implement Xtensa targets in Clang esp32,esp8266, etc" and add support for multilib and linker. It is about 8-12 patches. Some of these patches will be complex, so in optimistic case will take another 2-3 month and will be finished in January/Febraury. > In a pessimistic case, this process may take another 2-4 months. ---
**Author:** ![phranck](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/phranck/32/29758_2.png) [@phranck](https://forums.swift.org/u/phranck)\ **Post date:** [July 10, 2024, 3:53pm UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/13 "2024-07-10T15:53:39Z")
+1 from my side, too. I'm very interested in support for xtensa chips. 👍🏼 ---
**Author:** ![gerekon](https://sea2.discourse-cdn.com/swift/user_avatar/forums.swift.org/gerekon/32/37241_2.png) [@gerekon](https://forums.swift.org/u/gerekon)\ **Post date:** [September 11, 2024, 10:56am UTC](https://forums.swift.org/t/is-there-support-for-xtensa-lx7-cores/72458/14 "2024-09-11T10:56:50Z")
Hi guys! There are some details about upstreaming plans posted [Tracking Issue for merging to upstream (LLVM-57) · Issue #4 · espressif/llvm-project · GitHub](https://github.com/espressif/llvm-project/issues/4#issuecomment-2343204459). I hope after upstreaming onging 6 patches (in October) we will start doing this in parallel. So if some of you can help with review process that would be great.